Cumulative Computer Quiz #1

Hmm, another 24h gone with the wind and without an answer! :eek:

Are there no hardware cracks here? This is the basic of every machine code programming. Not always known by high-level programmers, but everyone ever having to do assembler programming should know this.
Come on!
:D
 
Hey Lucky, looks like you have us all stumped here, sorry I must surrender to this question :D
 
Well, ok. :yeah:

Here is the answer:
1. T-state - smallest step of CPU work, 1 or 2 clock steps, depending on CPU type

2. machine cycle (M-cycle) - describes a complete sub-instruction, e.g. "set interrupt", made up of several T-states

3. instruction cycle - a complete CPU instruction, includes several machine cycles


Now as an amendment to this question, I´ll ask the next one.

Name at least 5 examples of basic machine cycles (excluding the one above)!
EVERY CPU instruction starts with the same machine cycle. Name it!


HINT: The answer for the second question was already mentioned!
:D
 
Hmm, I tried to remember my Technical Computer Science I course (for the original question), but I had severe translation problems I guess.
Could you (Lucky) answer two questions, please?
1. Translate the three terms into German. :D
2. Are you talking about RISC, CISC or both architectures?

I know the following levels:
- Machine code
- Pseudo-commands (like "add")
- Instructions (like "add $t1, $t2, $t1)

Maybe I should add that I learned that on the examle of a MIPS R2000 simulator. And maybe I should also add that I forgot most of that course. :lol:
 
The translation was the bigger problem for me, too, but I compared with some native English introductions to CPU architecture and it was similar or even equally explained there. :yeah:

to 1.
1. T-Zustand - kleinster Operationsschritt der CPU
2. M-Zyklus, Maschinenzyklus, Operationszyklus - eine Teiloperation eines Befehls
3. Befehlszyklus - Zeitspanne für die Abarbeitung eines kompletten Befehls

to 2.
Well, RISC architecture is more or less a downgrade from the CISC (hence "reduced instruction set computer"). But the basic division would stay the same, RISC computers also work an the basis of a clock, have partial operations (sub-instructions), etc. But the RISC architecture allows more than that.
BUT I was talking generally about a CPU, as used in PCs and other computer, therefore about CISC architecture. Microprocessors using RISC architecture are not generally referred to as CPUs, this name was "invented" for PCs and workstations.
So the answer would be BOTH, but specifically for CISC architecture.


The levels you mention are programming levels, I wanted the actual hardware levels (cycles) of the CPU. The steps it goes through when processing one instruction, which can be written in machine code, pseudo code or any higher programming language.
:D
 
Thats it, I've had enough of this sh!t. We haven't had an answerable question in almost two weeks.
 
Why, thanks for being so polite and subtle! :rolleyes:

I already posted a new one! And the old one was only 4 days old, with several answers posted.
I´m sorry if that´s too hard for you, but only software questions all the time are boring. :p

Here is the current question again:
Name at least 5 examples of basic machine cycles (e.g. "set interrupt")!
EVERY CPU instruction starts with the same machine cycle. Name it!


Several machine cycles have been named already, especially the one that´s always the first.
:D
 
Five bucks says this one goes unanswered too.
 
Well the first is the "Get OP-code from memory" that you already mentioned.
Others are (I think) "Get value from register in memory", "add", "break if equal", "jump register", or "load byte"

But I'm still not sure what you mean. Do you mean things like above or the actual procession cycle in the CPU? Like "the program counter does..." or "then the MBR..."?
 
For the new question I just want the names of an actual machine cycle.

"Get OP-code from memory" is always the first cycle, the M1-cycle. Correct!

"Read from memory" would be another machine cycle.

ADD would be an instruction, as it is composed of several machine cycles. Break... too, jump also and load too.

Those you mentioned last are assembler commands or machine code commands. The resemble a complete instruction. But they all need several basic steps to achieve their goal.

In a CPU you have several command lines, write (WR), read (RD), interrupt (INT), memoryrequest (MREQ), I/O-request (IORQ), wait, the data bus, the address bus and a few others.
They are set to low or high to show what the CPU is currently doing. For example, let´s say the value '5' lies at the data bus and a certain memory adress at the address bus. And we want to write the '5' to memory, so we have to set MREQ to high (we want access to the memory and when we set WR to high, too, the data is written to the memory, at the address specified.
Such a cycle would be 1 machine cycle. I want the name for this (easy) and others.

We need to remember that all memory and all IO-units are on the same bus. Interrupts are needed to coordinate the communication.

Now let´s just say we want the CPU to read a value from memory and print that value to an I/O-device.
For such an instruction, we need
1. OP-code fetch cycle (M1-cycle) (already mentioned)
2. "Read value from memory" cycle (mentioned)
3. ...
4. ...

Now what could be 3. and 4.? First we need to tell the I/O-device that we have data for it and then we have to send it. What would be the machine cycles needed?
And what would be other ones?
:D
 
Ah thanks, now I at least know what you are talking about. :)

And the example you gave (of reading and printing) was actually a question on a worksheet I had to do once. But unfortunately I had already decided to switch to math at that point and therefore only learned for the oral exam, passed it and forgot most. :D
I remember though, that we didn't use the cycles but had to give every single action, like "setting high the data bus", "setting low the address bus". In other words: a communication protocol.

I could easily look it up but that wouldn't be in the spirit of the game.
 
Well, the cycle names are rather descriptive, and the ones missing also rather easy to derive. I already more or less wrote what those machine cycles would have to do, all you need is a descriptive name for it. :yeah:

A sidenote: There are much more than 4 steps required for the actual instruction. Those are only the 4 basic steps. For example before the interrupt can be processed, you have to load the number of the specific interrupt routine into a certain register in memory. Then, during the interrupt, several other machine cycles are used, for example to save the state before the interrupt into memory.


So now everything is more or less said, only someone to write down a name for step 3 and 4 and maybe derive others from that is needed.
:D
 
However, don't you think BlueMonday is quite right about his remark (though it was a little - well - direct)?
After all you need very extensive knowledge of the topic, and not many people have either an interest in this specific, for most rather academical, aspects of the hardware, or are studying computer science.

Okay, I admit a whole lot of people is studying computer science... :lol:
 
I have stopped watching this thread because it requires too much on hand knowledge which makes some of these questions impossible to answer. As I stated earlier in the thread I thought it would be a good idea to allow researching...but I was overruled by every one else participating. I am really suprised that Hitro was able to answer this question without looking it up. Good job Hitro! :goodjob:
 
I'm almost too ashamed to post here anymore, I won't tell you what I am studying, but somehow I'm just not able to recall these things from memory.

I'll try another stab in the dark though for no. 3: could that be IO-Request (IORQ, Ok, it's not really a cycle just a signal...)
 
"Set the INT-request" could be a name for the 3rd cycle, yes! :yeah:

And for the 4th a name would be "Write to I/O".
As I said, rather descriptive.
The main machine cycles are:

M1-cycle - fetch OP-code from memory
Memory write cycle
Memory read cycle
I/O write cycle
I/O read cycle
WAIT-cycle
maskable interrupt (INT) cycle
not-maskable (NMI) cycle

and others.
So, for example, the instruction "Write data to memory" would require a M1-cycle and a memory write cycle.
That´s all, nothing really difficult. :eek:

Now here is something really easy:
Which part of the CPU does the actual calculations?

Also already mentioned in this thread.
:D
 
That would be the Arithmetic-Logical Unit (ALU).
 
Correct! :yeah:

Go on.
:D
 
Ok, this shouldn't be horrible, 3 parter.

1. Who came up with the first design for what we would call
a computer?

2. Who built the first working computer?

3. When was it built?
 
Back
Top Bottom